I am interested in supervising research students covering a wide range of theory and practice of using hardware to implement fast or real-time algorithms, especially numerical algorithms. I have active research in the architectures, compiler and synthesis tools, and applications of reconfigurable hardware (FPGAs) for this purpose. In particular, I am interested in how memory subsystems can be automatically designed to support particular algorithms or classes of algorithm, and how finite precision numerical hardware can calculate approximations to real number computation with rigorous guarantees covering accuracy as well as performance and resource utilisation. Further information on my research can be found at http://cas.ee.ic.ac.uk/people/gac1/